Energy Stored In A Cap & Energy Required To Charge Up A Cap

Half of the energy drawn from the source is dissipated by the resistor, no mater how small the resistor is

LDO Step Response

Due to the pole-zero doublet induced by the output capacitance with ESR and load resistance, the step response will slow down at the end of the ramp process.

Using "save" Statement In Corner Simulation

where the content of  save.scs file is something like:

OPAMP Not Working Issue

The issue is:
when supply power (Vdd) is lower, LDO loses its control to its output. Turns out that at this moment the OPAMP is not working.

As can be seen, the input differential pair are working in linear region, that makes the loop open, and in turn LDO loses its control.

I rised the mirror load, and the new simulation results are:

This is it is still not working properly, the amplifier ran out of steam, so I should be aggressive and shrink the length of the mirror load even further.

Fourier Transform of Sampled Signal vs. Discrete Fourier Transform

Current Variation for Different Biasing Scheme

A simple circuit for different biasing scheme is simulated, and the results are shown below:

• For series diode biasing scheme, current variation ranges from 8% to 400% (PVT)
• For const-gm current biasing scheme, current variation ranges from 50% to 100% (PVT)

Network Function Gain (magnitude) in pz analysis of Spectre

After pz analysis, use pzSummary function will generate the so called "Network function gain"

This Network function gain is actually the NFG shown in the formula below,

To get the DC gain from this network function gain, you should:

where the DC gain is defined as

LDO Model

Emulate Amplifier Using VCCS

stub

Impedance of Capacitance

Simulate DFF Setup/Hold Time Using SpectreMDL

stub

"percent" Flag in Monte Carlo Simulation

stub

CIS: CMOS Image Sensor

CIS

Add Newline in Wavescan Label:

use <br>: 

SAR ADC & Charge Redistribution DAC

There is a extra Vin pin on SAR ADC caps array.

DNL of Charge Scaling DAC

TSMC model: difference between nch and nch_mac

Errors in Allen's CMOS Analog Circuit Design

DAC INL/DNL

interesting property related to DAC INL

stub

DAC Transfer Function

stub